Why a GPU TEE matters
CPU TEEs (SGX, TDX, SEV-SNP) solved "data in use" for CPU workloads. Modern inference and training are GPU-bound, though, so if the prompt leaves the CPU enclave in plaintext across the PCIe bus to a non-confidential GPU, the whole chain breaks. A malicious hypervisor, a PCIe-snooping cloud operator, or a rogue firmware blob on the GPU can read every token.
NVIDIA Confidential Computing first shipped on H100 / Hopper in 2023, expanded on H200 in 2024, and on Blackwell B100/B200/GB200 in 2024-2025. It extends the TEE boundary across the PCIe link and into the GPU itself.
Architecture
┌─────────────────────────────────────────────┐
│ Confidential VM (TDX / SEV-SNP) │
│ ┌───────────────────────────────────────┐ │
│ │ Guest OS + CUDA app (measured) │ │
│ └───────────────────────────────────────┘ │
│ │ encrypted PCIe (SPDM/AES-GCM)│
│ ▼ │
│ ┌───────────────────────────────────────┐ │
│ │ NVIDIA GPU in CC-On mode │ │
│ │ ┌──────────────────────────────┐ │ │
│ │ │ GPU Secure Processor (GSP) │ │ │
│ │ │ - Hardware root of trust │ │ │
│ │ │ - Firmware measurement │ │ │
│ │ │ - Attestation signing key │ │ │
│ │ └──────────────────────────────┘ │ │
│ │ ┌──────────────────────────────┐ │ │
│ │ │ Protected GPU memory │ │ │
│ │ │ Hopper HBM: unencrypted │ │ │
│ │ └──────────────────────────────┘ │ │
│ └───────────────────────────────────────┘ │
└─────────────────────────────────────────────┘
Components
| Component | Role |
|---|---|
| GPU Secure Processor (GSP) | On-die microcontroller; the GPU's root of trust. Measures firmware, holds the per-device ECDSA P-384 attestation key, produces quotes. |
| Secure Boot | GSP verifies signed firmware before CUDA is allowed to run; failure locks the GPU out of CC mode. |
| Protected GPU memory | Hopper HBM is not encrypted. NVIDIA’s threat model relies on on-package memory and access controls; memory protection must not be described as HBM encryption. |
| Encrypted CPU–GPU transfers | The driver inside the CPU TEE stages encrypted data in shared-memory bounce buffers. Command buffers and CUDA kernels are also encrypted before crossing PCIe. This does not imply encryption of every PCIe transaction. |
| NVIDIA Remote Attestation Service (NRAS) | Cloud service that verifies GSP-signed quotes and checks firmware versions against a known-good list; returns a JWT to the relying party. Local verification also supported. |
| Confidential Compute Mode | Boolean state on the GPU. Set by privileged firmware command; once on, non-CC code paths are disabled and attestation becomes required for use. |
Modes
- CC-Off: regular, non-confidential. Any mode switch wipes HBM.
- CC-On: GPU confidential-computing protections and attestation are enabled. CPU–GPU transfers use encryption; Hopper HBM remains unencrypted.
- CC-On (DevTools): looser mode for debugging. Do not ship production with this.
- Multi-GPU: Hopper protected-PCIe (PPCIe) mode encrypts CPU–GPU traffic, while GPU–GPU traffic over NVLink remains unencrypted. Blackwell multi-GPU CC mode also encrypts NVLink traffic. Assess the supported hardware, firmware and driver configuration for each mode.
The attestation flow (end to end)
- The client opens TLS to the relying service and requests attestation evidence before sending the prompt.
- The CPU TEE (TDX/SEV-SNP) generates its quote with a nonce supplied by the client, including the hash of the GPU attestation token it just received.
- The GPU produces its own quote (via GSP) over the same nonce plus the current firmware version and CC mode status, signed by the device-unique attestation key.
- The client (or a verifier the client trusts) checks: - The CPU quote against Intel PCS / AMD KDS collateral. - The GPU quote against NVIDIA's device-certificate chain plus the NRAS revocation list. - Firmware version is at least the policy-defined minimum. - The measurement (MRTD for TDX; measurement of OVMF + kernel + initrd + rootfs) matches the expected value for the published image.
- The client derives a session key bound to both quotes. From this point the prompt is encrypted to the dual-attested TEE and no component in the cloud can decrypt it.
Replay is prevented by the client nonce. Operator substitution is prevented because the GPU cert chain is rooted in NVIDIA's factory-provisioned keys; the cloud operator cannot forge a quote without a CVE-class break.
Performance cost
Rough numbers (H100 CC, 70B-class dense LLM inference, published and independently measured in 2024-2025):
| Phase | Overhead vs. non-CC |
|---|---|
| First-token latency (attestation + key exchange) | +30–120 ms once per session |
| Sustained token throughput | 5–15% lower |
| H2D / D2H copy-heavy workloads | up to 25% lower |
| Pure compute (matmul-dominated, data resident in HBM) | ~2–5% lower |
Rule of thumb: for steady-state LLM serving, assume around 10% cost. For training or workloads that thrash PCIe, the cost is higher and may be prohibitive until Blackwell's encrypted NVLink is the norm.
Blackwell multi-GPU CC adds NVLink encryption. That protects a specific interconnect; it is not evidence that every GPU memory region or system link is encrypted.
What NVIDIA CC does not protect against
- Side channels you bring yourself. Timing leaks in your CUDA code, cache-based attacks across SMs for co-tenanted GPUs (not a concern if you own the whole GPU; MIG partitioning in CC mode is restricted).
- Model extraction via the API. The TEE prevents raw weight theft; it does not prevent slow distillation via queries.
- Driver compromise on the host. The host NVIDIA driver is untrusted by design; that is the point. But a buggy guest driver inside your CVM can still leak. Keep the guest-side
nvidia-opendriver pinned and audited. - GSP firmware bugs. CVEs in GSP firmware have dropped before (see 2023 advisories). Treat the GSP as part of your TCB and monitor NVIDIA security advisories the same way you track Intel/AMD microcode.
- Covert channels via power or thermal. Co-located TEE workloads can sometimes be distinguished by power draw observable to the cloud operator. Not a confidentiality break for plaintext, but a weak fingerprint channel.
Clouds that offer it
| Provider | SKU | CPU TEE | GPU | Notes |
|---|---|---|---|---|
| Azure | NCC H100 v5 | AMD SEV-SNP (Genoa) | H100 CC | GA; first major cloud with GPU CC |
| GCP | A3 Confidential | Intel TDX (Sapphire Rapids / EMR) | H100 CC | Preview as of late 2025 |
| Oracle OCI | BM.GPU.H100.CC | AMD SEV-SNP | H100 CC | GA |
| AWS | (none GA for H100 CC as of early 2026) | Nitro + SEV-SNP | H100/H200 non-CC | Nitro Enclaves do attest but don't extend to GPU; AWS roadmap signals Trainium/Blackwell CC future |
| CoreWeave / Lambda / Crusoe | Various H100/H200/B200 | TDX or SEV-SNP | CC optional | Early access / bring-your-own orchestration |
| Phala / Marlin / Tinfoil | Decentralized | TDX / SEV-SNP | H100 CC | On-chain-attested GPU marketplaces |
Practical deployment checklist
- Enable CC mode on the GPU (
nvidia-smi conf-compute -srs 1; sticky across reboots; wipes HBM on transition). - Pin GSP firmware at or above the minimum version that patches the latest advisory (track
nvidia.com/en-us/security/). - Use the NVIDIA Confidential Computing SDK / NVTrust for attestation collection. Do not roll your own quote parser.
- Verify both quotes, not just the CPU one. Many early deployments verified the TDX quote and assumed the GPU was fine. It wasn't.
- Bind the attestation to your session. The client nonce must appear in both quotes and in the TLS key-export.
- Reject CC-Off GPUs explicitly. Default-closed: if the GPU quote says CC mode = off, drop the connection.
- Rotate on CVE. When a GSP-firmware CVE drops, push a new minimum-firmware policy to your verifier. Old quotes become invalid automatically.
- Don't leak via logs. The confidential guarantee is worthless if the app logs prompts to stdout and a sidecar ships them to the cloud's logging service. Build with
nvidia-container-toolkitin no-persistence mode.
Primary sources
- NVIDIA H100 confidential computing: bounce buffers and unencrypted HBM
- NVIDIA confidential VM threat model and interconnect limits
- NVIDIA Hopper and Blackwell confidential-computing whitepaper
- NVIDIA Blackwell architecture technical brief
- NVIDIA NVTrust
- NVIDIA attestation documentation
- DMTF SPDM 1.2 specification
Page history
- Updated
- 2026-10-25
- Origin
- Compiled from the ungovernable.tech research notes.
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